20 C 40 ghz amplifier technical data features ? large bandwidth: 20 - 44 ghz typical 21 - 40 ghz specified ? high gain: 22 db typical ? saturated output power: 21 dbm typical ? supply bias: 4.5 volts @ 300 ma description the HMMC-5040 is a high-gain broadband mmic amplifier designed for both military appli- cations and commercial commu- nication systems. this four stage amplifier has input and output matching circuitry for use in 50 ohm environments. it is fabricated using a phemt integrated circuit structure that provides exceptional broadband performance. the backside of the chip is both rf and dc ground. this helps simplify the assembly process and reduces assembly related performance variations and costs. this mmic is a cost effective alternative to hybrid (discrete-fet) amplifiers that require complex tuning and assembly processes. HMMC-5040 absolute maximum ratings [1] symbol parameters/conditions units min. max. v d1, 2-3-4 drain supply voltages v 5 v g1, 2-3-4 gate supply voltages v -3.0 0.5 i dd total drain current ma 400 p in rf input power dbm 21 t ch channel temperature [2] c +160 t a backside ambient temp. c -55 +75 t stg storage temperature c -65 +165 t max maximum assembl y temp. c +300 note: 1. absolute maximum ratings for continuous operation unless otherwise noted. 2. refer to dc specifications/physical properties table for derating information. chip size: 1720 x 760 m m (67.7 x 29.9 mils) chip size tolerance: 10 m m ( 0.4 mils) chip thickness: 127 15 m m (5.0 0.6 mils) pad dimensions: 80 x 80 m m (3.1 x 3.1 mils)
2 HMMC-5040 dc specifications/physical properties [1] symbol parameters and test conditions units min. typ. max. v d1, 2-3-4 drain supply operating voltages v 2 4.5 5 i d1 first stage drain supply current ma 55 (v dd = 4.5 v, v g1 = -0.6 v) i d2-3-4 total drain supply current for stages 2, 3, and 4 ma 24.5 (v dd = 4.5 v, v gg = -0.6 v) v g1, 2, 3-4 gate supply operating voltages (i dd = 300 ma) v -0.6 v p pinch-off voltage (v dd = 4.5 v, i dd 10 ma) v -2 -1.2 -0.8 q ch-bs thermal resistance [2] c/w 62 (channel-to-backside @ t ch = 160 c) t ch channel temperature [3] (t a = 125 c, mttf > 10 6 hrs, c 160 v dd = 4.5 v, i dd = 300 ma) notes: 1. backside ambient operating temperature t a = 25 c unless otherwise noted. 2. thermal resistance ( c/watt) at a channel temperature t ( c) can be estimated using the equation: q (t) @ 62 x [t( c)+ 273] / [160 c + 273]. 3. derate mttf by a factor of two for every 8 c above t ch . HMMC-5040 rf specifications, t a = 25 c, v dd = 4.5 v, i dd = 300 ma, z o = 50 w broadband narrow band symbol parameters/conditions specifications performance units min. typ. max. typical bw operating bandwidth ghz 21 20C44 40 21C24 27C29 37C 40 s 21 small signal gain db 20 22 25 23 22 d s 21 small signal gain flatness db 1.5 1 0.75 0.3 (rl in ) min minimum input return loss db 8 10 9 10 14 (rl out ) min minimum output return loss db 8 10 10 11 12 s 12 reverse isolation db 54 54 54 54 p -1db output power dbm 18 18 18 18 (@ 1db gain compression) p sat saturated output power dbm 20 21 21 21 21 @ 3 db gain compression
3 HMMC-5040 applications the HMMC-5040 broadband amplifier is designed for both military (35 ghz) applications and wireless communication systems that operate at 23, 28, and 38 ghz. it is also suitable for use as a frequency multiplier due to excellent below-band input return loss and high gain. biasing and operation the recommended dc bias condition is with all drains connected to single 4.5 volt (or less) supply and all gates con- nected to an adjustable negative voltage supply as shown in figure 12a. the gate voltage is adjusted for a total drain supply current of typically up to 300 ma. figures 4, 5, 8, and 9 can be used to help estimate the minimum drain voltage and current necessary for a given rf gain and output power. the second, third, and fourth stage dc drain bias lines are connected internally (figure 1) and therefore require only a single bond wire. an additional bond wire is needed for the first stage dc drain bias, v d1 . only the third and fourth stage dc gate bias lines are connected internally. a total of three dc gate bond wires are required: one for v g1 , one for v g2 , and one for the v g3 -to-v g4 connection. the rf input has matching circuitry that creates a 50 ohm dc and rf path to ground. a dc blocking capacitor should be used in the rf input transmission line. any dc voltage applied to the rf input must be maintained below 1 volt. the rf output is ac-coupled. no ground wires are needed since ground connections are made with plated through-holes to the backside of the device. the HMMC-5040 can also be used to double, triple, or quadruple the frequency of input signals. many bias schemes may be used to generate and amplify desired harmonics within the device. the information given here is intended to be used by the customer as a starting point for such applications. optimum conversion efficiency is obtained with approximately 14 dbm input drive level. as a doubler, the device can multiply an input signal in the 10-20 ghz frequency range up to 20-40 ghz with conversion gain for output frequencies exceeding 30 ghz. similarly, 5-10 ghz signals can be quadrupled to 20-40 ghz with some conversion loss. frequency doubling or quadrupling is accomplished by operating the first gain stage at pinch-off (v g1 = v p @ -1.2 volts). stages 2, 3, and 4 are biased for normal amplification. the assem- bly diagram shown in figure 12b can be used. to operate the device as a frequency tripler the drain voltage can be reduced to approximately 2.5 volts and the gate voltage can be set at about -0.4 volts or adjusted to minimize second harmonics if needed. either of figures 12a or figure 12b can be used. contact your local agilent sales representative for additional information concerning multiplier performance and operating conditions. assembly techniques solder die attach using a fluxless gold-tin (ausn) solder preform is the recommended assembly method. a conductive epoxy such as ablebond ? 71-1lm1 or ablebond ? 36-2 may also be used for die attaching provided the absolute maximum ratings are not exceeded. the device should be attached to an electri- cally conductive surface to complete the dc and rf ground paths. the backside metallization on the device is gold. it is recommended that the rf input and output connections be made using either 500 lines/inch (or equivalent) gold wire mesh. the rf connections should be kept as short as possible to minimize inductance. the dc bias supply wires can be 0.7 mil diameter gold. thermosonic wedge is the preferred method for wire bonding to the gold bond pads. mesh wires can be attached using a 2 mil round tacking tool and a tool force of approximately 22 grams with an ultrasonic power of roughly 55 db for a duration of 76 8 msec. a guided- wedge at an ultrasonic power level of 64 db can be used for the 0.7 mil wire. the recommended wire bond stage temperature is 150 2 c. for more detailed information see agilent application note #999 gaas mmic assembly and handling guidelines. gaas mmics are esd sensitive. proper precautions should be used when handling these devices.
4 figure 1. HMMC-5040 simplified schematic diagram. in v g1 50 out v g3 v g4 matching matching matching matching matching v d1 v g2 v d2 v d3 v d4 HMMC-5040 typical performance 20 24 28 32 36 40 frequency (ghz) v dd = 4.5 v, i dd = 300 ma figure 2. typical gain and isolation vs. frequency. [1] 30 26 22 18 14 10 0 10 20 30 40 50 60 70 small-signal gain (db) reverse isolation (db) gain isolation 20 24 28 32 36 40 frequency (ghz) v dd = 4.5 v, i dd = 300 ma figure 3. typical input and output return loss vs. frequency. [1] 0 5 10 15 20 25 0 5 10 15 20 25 input return loss (db) output return loss (db) input output figure 4. broadband gain as a function of drain current vs. frequency with v dd = 4.5 v. [1] 30 24 18 12 6 0 small-signal gain (db) 10 18 26 34 42 50 frequency (ghz) v dd = 4.5 v spec range 21 ?40 ghz 300 ma 250 ma 200 ma 150 ma 100 ma figure 5. broadband gain as a function of drain current vs frequency with v dd = 3 v. [1] 30 24 18 12 6 0 small-signal gain (db) 10 18 26 34 42 50 frequency (ghz) v dd = 3 v spec range 21 ?40 ghz 300 ma 250 ma 200 ma 150 ma 100 ma note: 1. wafer-probed measurements
5 HMMC-5040 typical performance, continued 60 30 0 30 60 90 operating temperature ( c) v dd = 4.5 v, i dd = 300 ma @ t a = 25 c figure 6. small-signal gain [3] and compressed power [1] vs. temperature. 35 30 25 20 15 10 40 35 30 25 20 15 small-signal gain (db) compressed output power (dbm) gain power 22 ghz 28 ghz 38 ghz 25 ghz 30 ghz 35 ghz 40 ghz 20 24 28 32 36 40 frequency (ghz) figure 7. noise figure vs. frequency. 20 16 12 8 4 0 noise figure (db) v dd = 4.5 v i dd = 300 ma v dd = 2.0 v i dd = 170 ma v dd = 3.0 v i dd = 130 ma notes: 1. output power into 50 with 2 dbm input power. wafer-probed measurements. 2. wafer-probed measurements. 3. measurements taken on a device mounted in a connectorized package calibrated at the connector terminals. 0.06 db/ c 100 300 200 total drain current, i dd (ma) v dd = 4.5 v figure 8. output power [1] and efficiency vs. drain current with v dd = 4.5 v. 23 21 19 17 15 13 25 21 17 13 9 5 output power, p sat (dbm) power-added effeciency @ p sat (%) efficiency power 23 ghz 28 ghz 38 ghz 42 ghz 100 300 200 total drain current, i dd (ma) v dd = 3 v figure 9. output power [1] and efficiency vs. drain current with v dd = 3 v. 23 21 19 17 15 13 25 21 17 13 9 5 output power, p sat (dbm) power-added effeciency @ p sat (%) power 23 ghz 28 ghz 38 ghz 42 ghz 6 10 14182226 output power (dbm) v dd = 4.5 v, i dd = 300 ma, f = 40ghz figure 10. gain compression and efficiency characteristics. [2] 30 26 22 18 14 10 20 25 10 5 0 gain (db) power-added efficiency (%) gain h added 20 24 28 32 36 40 frequency (ghz) v dd = 4.5 v, i dd = 300 ma figure 11. output power and gain vs. frequency characteristics. [2] 30 26 22 18 14 10 30 26 22 18 14 10 output power, p ?db and p sat (dbm) small-signal gain (db) p sat gain p ?db efficiency
this data sheet contains a variety of typical and guaranteed performance data. the information supplied should not be interpreted as a complete list of circuit specifica- tions. in this data sheet the term typical refers to the 50th percentile performance. for additional information contact your local agilent sales representative. figure 12. HMMC-5040 common assembly diagrams. (note: to assure stable operation, bias supply feeds should be bypassed to ground with a capacitor, c b > 100 nf typical.) figure 13. HMMC-5040 bonding pad locations. (dimensions in micrometers) figure 12a. single drain and single gate supply assembly for tripler and standard amplifier applications. figure 12b. separate first-stage gate bias supply for any multiplier or amplifier application. this diagram shows an optional variation to the v g2 jumper-wire bonding scheme presented in (a). gold plated shim (optional) to v dd dc drain supply feed v g2 to v g3 jumper-wire [or use v g2 wire shown in (b)] ( @ 100 pf) ( @ 100 pf) rf in v d1 c b v g2 v d2-3-4 v g3-4 v g1 rf out to v gg dc gate supply feed c b to v dd dc drain supply feed ( @ 100 pf) ( @ 100 pf) rf in v d1 c b v g2 v d2-3-4 v g3-4 v g1 rf out ( @ 100 pf) to v gg dc gate supply feed to v g3-4 dc gate supply feed c b c b 0 0 760 95 480 0 0 300 660 70 330 700 930 1180 1465 95 710 1200 1640 1720 www.semiconductor.agilent.com data subject to change. copyright ? 1999 agilent technologies 5965-5444e (11/99)
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